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Cadence Contribution to Accellera Boosts Efforts to Standardize IC Design Kits for Designers
Device-Level Schematic Symbol Set to Improve Interoperability and
Cycle Time Efficiencies Across the Design Chain
SAN JOSE, Calif.—(BUSINESS WIRE)—March 22, 2005—
Cadence Design Systems, Inc. (NYSE:CDN)(Nasdaq:CDN) today
announced that it has contributed its custom-design schematic symbol
set to the OpenKit Initiative. Part of Accellera, the electronics
industry organization focused on electronic-design-automation (EDA)
standards, the OpenKit Initiative is dedicated to establishing
standards for the design kits used by all integrated circuit (IC)
designers. These standards are targeted at improving interoperability
and cycle time efficiencies across the electronics-design chain, while
decreasing custom intellectual property (IP) or IC design costs. The
Cadence contribution will form the basis of an open standard for the
electronic representation of device symbols.
Design kits provide the design rules, device models, schematic
symbols and associated formats required by EDA tools during the design
entry, simulation, implementation and verification steps of IC design.
With the emergence of the design chain, design kits have become
essential for linking semiconductor manufacturers and design teams
developing IC-based products. With no current standards, nomenclature,
use models, interfaces, quality thresholds, and delivery structures
can vary widely, depending on the selection of tools, library or IP
and targeted foundry requirements. The OpenKit Initiative has been
working to address these problems since January 2004, and the Cadence
donation represents a critical first step in creating standards for
the design-capture phase of custom IC design.
"This is a great example of how Accellera works with leading EDA
companies to accelerate the development of standards important to the
growth of our industry," said Dennis Brophy, chairman of Accellera.
"Cadence's contribution is the first step in establishing an IEEE
standard for a schematic symbol set."
James Roberts, CAD engineer at Qualcomm, the co-chair of the front
end working group, added, "As a user of multiple process design kits
(PDKs), it has always been frustrating to move designs from one PDK to
another and then have to correct the wiring in every circuit because
of vendor-specific symbol footprints. This symbol standard will go a
long way towards easing that problem."
"Cadence has long been recognized as the de facto standard for
device-level schematic symbols," said James Lin, vice president of
Technology Infrastructure at National Semiconductor. "Cadence's
contribution of their symbol set to an industry-wide, open-standards
committee is a significant move towards standardizing design kits."
"Cadence has long been a leader in providing support for open
standards across the industry to better serve our customers," said Jan
Willis, senior vice president of Industry Alliances at Cadence.
"Working with groups such as Accellera and Si2, we are actively
involved in defining the standards that are necessary to ensure that
software, IP, and libraries interoperate seamlessly in our customers'
design and manufacturing environments. This contribution continues to
demonstrate our commitment to collaboration, based on open standards,
to facilitate the growth of the industry, as well as our customers'
success."
Accellera provides design standards for quick availability and use
in the electronics industry. The organization and its members
cooperatively deliver much-needed EDA standards that lower the cost of
designing commercial IC and EDA products.
About Cadence
Cadence is the world's largest supplier of electronic-design
technologies and engineering services. Cadence products and services
are used to accelerate and manage the design of semiconductors,
computer systems, networking equipment, telecommunications equipment,
consumer electronics, and other electronics-based products. With
approximately 4,900 employees and 2004 revenues of approximately $1.2
billion, Cadence has sales offices, design centers, and research
facilities around the world. The company is headquartered in San Jose,
Calif., and trades on both the New York Stock Exchange and Nasdaq
under the symbol CDN. More information is available at
www.cadence.com.
Cadence, the Cadence logo and Allegro are registered trademarks of
Cadence Design Systems. All other trademarks are the property of their
respective owners.
Contact:
Cadence Design Systems, Inc.
Michael Fournell, 408-428-5135
fournell@cadence.com
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